国产久在线观看免费视频_亚洲欧美日韩国产丝袜自拍_99精品热在线观看视频88_亚洲无码毛片在线观看_日韩精品一区二区无码本色_东北露脸46熟妇ⅩⅩXX_国产一级中文a级毛片好看到停不下来!_日韩曰批全过程免费视频_97久久久人妻一区_婷婷五月天丁香最新电影

TRADE NEWS

Current Location:Home > News > Trade news

Media Focus | How to Implement Full Digital Power Control for LDO

2023-04-25
瀏覽:681 次
返回列表
Media Focus | How to Implement Full Digital Power Control for LDO

Compared to ten years ago, todays power requires more flexible power solutions and more digital controls, especially in the field of server cloud computing. The era of using resistors and capacitors to desorb and adjust voltage control loops is long gone.

Looking back on history, digital power control began with a single-phase load point (POL) converter with a PMBus interface. Nowadays, it has evolved into a multiphase control scheme that can provide up to 100A of output current capacity, making it very suitable for applications such as multi-core CPUs, accelerators, artificial intelligence (AI) chips, and network processors. So far, engineers have been able to control each switching power supply on the circuit board through digital power supplies, but they have not been able to achieve digital control of linear regulators (also known as low voltage differential regulators or LDOs). However, with the emergence of digital power monitoring ICs, engineers can now fully digital control each power supply in the system.

This article explores the trend of power management in the field of high-performance computing and introduces how to design a digital controlled LDO regulator circuit to achieve voltage and current monitoring, and fault telemetry through PMBus commands.

Requirements for server power rails

Generally speaking, cloud computing servers require multiphase power control, providing 30A to 100A output current capabilities for memory (VDIMM) and Vcore, respectively. Power rails below 30A are implemented using single-phase POL converters. The remaining power rails are low-power power rails, typically implemented using LDO regulators. Figure 1 shows the number of power rails required for consecutive generations of servers. As shown in the figure, future servers will require over 25 power rails.

Another trend in the field of high-performance computing is the balance between high performance and high efficiency. The system must provide high performance when necessary and provide the most efficient solution when operating in peak current mode. The typical requirement is standby or low-power mode. The digitally controlled LDO voltage regulator can increase margin regulation capability, reduce output voltage when low power mode is enabled, and even set the voltage to zero. Another advantage of this margin adjustment capability is that it can maintain the output voltage at ± 10% of the rated output voltage. Obviously, another advantage of digital controlled LDO regulators is that they can read each power rail in the system through PMBus and monitor interrupts or faults in real-time.

Design of digital controlled LDO voltage regulator

So, how to design a digital controlled LDO regulator? Next, take the ISL28023 digital power supply monitor as an example for explanation. The ISL28023 digital power supply monitor is a bidirectional current detection amplifier with PMBus interface, integrating digital telemetry function into analog systems. Engineers can flexibly monitor, protect, and control each LDO in the system.

The following provides a detailed introduction to the digital power monitor. As shown in Figure 2, multiple functions that engineers can use include:

VBUS/VINP/VINM - the main channel pin used to monitor LDO voltage and current; (Note: Current measurement requires an external current detection resistor.)

? DAC_ OUT - built-in 8-bit DAC for adjusting LDO output voltage;

SMBALERT2- The pin that triggers an alarm when the digital power monitor detects a fault state. Used to enable/disable LDO;

GND - Ground pin. To ensure the normal operation of voltage and current measurements, the grounding pins of the digital power monitor and LDO must be connected together.

By connecting the VBUS pin to the positive end of the output voltage of the LDO regulator and connecting the GND pin together, engineers can use a digital power monitor to achieve simple voltage measurement. However, in order to measure the output current of LDO, an external current detection resistor is also required.

A typical circuit for measuring LDO output voltage and output current using a digital power supply monitor is provided. The VBUS pin measures the voltage of LDO VOUT. Differential pins VP and VM measure the voltage at both ends of Rshunt. The value of Rshunt needs to be determined based on the setting of Vshunt in ISL28023 and the output current of LDO:

The Vshunt of the ISL28023 current monitor is allowed to be set within the range of 40mV/80mV. Ensure maximum utilization of this range during actual current measurement. For example, when the output current of ISL80101LDO is 1A and the Vshunt of ISL28023 is in the 80mV range, Rshunt must ensure that the measured value of Vshunt is approximately 80mV at 1A, which means that Rshunt is equal to 80mOhm.

The voltage margin of LDO can be achieved through the 8-bit DAC output of the digital power supply monitor. By integrating DAC_ The OUT pin is connected to the feedback network (ADJ pin) of LDO and can adjust the output voltage up/down.

The digital power monitor has two SMBALERT pins that can trigger high/low thresholds when fault conditions are met, and can also forcibly enable/disable LDO.